MOSFET Totally Explained

Everything about Metal Oxide Semiconductor Field-effect Transistor totally explained

The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a device used to amplify or switch electronic signals. It is by far the most common field-effect transistor in both digital and analog circuits.The MOSFET is composed of a channel of n-type or p-type semiconductor material (see article on semiconductor devices), and is accordingly called an NMOSFET or a PMOSFET (also commonly nMOSFET, pMOSFET).

Etymology

The 'metal' in the name is now often a misnomer because the previously metal gate material is now a layer of polysilicon (polycrystalline silicon; why polysilicon is used will be explained below). Previously aluminium was used as the gate material until the 1980s when polysilicon became dominant, owing to its capability to form self-aligned gates. IGFET is a related, more general term meaning insulated-gate field-effect transistor, and is almost synonymous with MOSFET, though it can refer to FETs with a gate insulator that isn't oxide. Some prefer to use "IGFET" when referring to devices with polysilicon gates, but most still call them MOSFETs.

Composition

Usually the semiconductor of choice is silicon, but some chip manufacturers, most notably IBM, have begun to use a mixture of silicon and germanium (SiGe) in MOSFET channels. Unfortunately, many semiconductors with better electrical properties than silicon, such as gallium arsenide, don't form good semiconductor-to-insulator interfaces and thus are not suitable for MOSFETs. However there continues to be research on how to create insulators with acceptable electrical characteristics on other semiconductor material.
   To overcome power consumption increase due to gate current leakage, high-κ dielectric is replacing silicon dioxide as the gate insulator, and metal gates are making a comeback by replacing polysilicon (see Intel announcement).
   The gate is separated from the channel by a thin insulating layer of what was traditionally silicon dioxide, but more advanced technologies used silicon oxynitride. Some companies have started to introduce a high-κ dielectric + metal gate combination in the 45 nanometer node.
   When a voltage is applied between the gate and source terminals, the electric field generated penetrates through the oxide and creates a so-called "inversion layer" or channel at the semiconductor-insulator interface. The inversion channel is of the same type – P-type or N-type – as the source and drain, so it provides a conduit through which current can pass. Varying the voltage between the gate and body modulates the conductivity of this layer and makes it possible to control the current flow between drain and source.

Circuit symbols

A variety of symbols are used for the MOSFET. The basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back into the same direction as the channel. Sometimes three line segments are used for enhancement mode and a solid line for depletion mode. Another line is drawn parallel to the channel for the gate.
The bulk connection, if shown, is shown connected to the back of the channel with an arrow indicating PMOS or NMOS. Arrows always point from P to N, so an NMOS (N-channel in P-well or P-substrate) has the arrow pointing in. If the bulk is connected to the source (as is generally the case with discrete devices) it's angled to meet up with the source leaving the transistor. If the bulk isn't shown (as is often the case in IC design as they're generally common bulk) an inversion symbol is sometimes used to indicate PMOS, alternatively an arrow on the drain may be used in the same way as for bipolar transistors (out for NMOS in for PMOS).
Comparison of enhancement-mode and depletion-mode MOSFET symbols, along with JFET symbols:

			P-channel
			N-channel
JFET	MOSFET enh	MOSFET dep

For the symbols in which the bulk, or body, terminal is shown, it's here shown internally connected to the source. This is a typical configuration, but by no means the only important configuration. In general, the MOSFET is a four-terminal device, and in integrated circuits many of the MOSFETs share a body connection, not necessarily connected to the source terminals of all the transistors.

MOSFET operation

For the operation of MOS devices discussed next, an authoritative reference is Tsividis .

Metal–oxide–semiconductor structure

A traditional metal–oxide–semiconductor (MOS) structure is obtained by depositing a layer of silicon dioxide (₂) and a layer of metal (polycrystalline silicon is commonly used instead of metal) on top of a semiconductor die. As the silicon dioxide is a dielectric material its structure is equivalent to a planar capacitor, with one of the electrodes replaced by a semiconductor.
When a voltage is applied across a MOS structure, it modifies the distribution of charges in the semiconductor. If we consider a P-type semiconductor (with

N_A

the density of acceptors, p the density of holes; p = N_A in neutral bulk), a positive voltage,

V_

,

with V_G = gate voltage, V_ch = voltage at channel side of insulator, and t_ins = insulator thickness. This equation shows the gate voltage won't increase when the insulator thickness increases, provided κ increases to keep t_ins /κ = constant. See the article on high-κ dielectrics for more detail, and the section in this article on gate-oxide leakage.

Junction design

The source-to-body and drain-to-body junctions are the object of much attention because of three major factors: their design affects the current-voltage (I-V) characteristics of the device, lowering output resistance, and also the speed of the device through the loading effect of the junction capacitances, and finally, the component of stand-by power dissipation due to junction leakage.
   The drain induced barrier lowering of the threshold voltage and channel length modulation effects upon I-V curves are reduced by using shallow junction extensions. In addition, halo doping can be used, that is, the addition of very thin heavily doped regions of the same doping type as the body tight against the junction walls to limit the extent of depletion regions.
   The capacitive effects are limited by using raised source and drain geometries that make most of the contact area border thick dielectric instead of silicon. These various features of junction design are shown (with artistic license) in the figure.
   Junction leakage is discussed further in the section increased junction leakage.

Other MOSFET types

Dual gate MOSFET

The dual gate MOSFET has a tetrode configuration, where both gates control the current in the device. It is commonly used for small signal devices in radio frequency applications where the second gate is normally used for gain control or mixing and frequency conversion.

FinFET

The Finfet, see figure to right, is a double gate device, one of a number of geometries being introduced to mitigate the effects of short channels and reduce drain-induced barrier lowering.

Depletion-mode MOSFETs

There are depletion-mode MOSFET devices, which are less commonly used than the standard enhancement-mode devices already described. These are MOSFET devices that are doped so that a channel exists even with zero voltage from gate to source. In order to control the channel, a negative voltage is applied to the gate (for an n-channel device), depleting the channel, which reduces the current flow through the device. In essence, the depletion-mode device is equivalent to a normally closed (on) switch, while the enhancement-mode device is equivalent to a normally open (off) switch.(External Link

) Due to their low noise figure in the RF region, and better gain, these devices are often preferred to bipolars in RF front-ends such as in TV sets. Depletion-mode MOSFET families include BF 960 by Siemens and BF 980 by Philips (dated 1980s), whose derivatives are still used in AGC and RF mixer front-ends.

NMOS logic

n-channel MOSFETs are smaller than p-channel MOSFETs and producing only one type of MOSFET on a silicon substrate is cheaper and technically simpler. These were the driving principles in the design of NMOS logic which uses n-channel MOSFETs exclusively. However, unlike CMOS logic, NMOS logic consumes power even when no switching is taking place. With advances in technology, CMOS logic displaced NMOS logic in the 1980s to become the preferred process for digital chips.

Power MOSFET

Power MOSFETs have a different structure than the one presented above. As with all power devices, the structure is vertical and not planar. Using a vertical structure, it's possible for the transistor to sustain both high blocking voltage and high current. The voltage rating of the transistor is a function of the doping and thickness of the N epitaxial layer (see cross section), while the current rating is a function of the channel width (the wider the channel, the higher the current). In a planar structure, the current and breakdown voltage ratings are both a function of the channel dimensions (respectively width and length of the channel), resulting in inefficient use of the "silicon estate". With the vertical structure, the component area is roughly proportional to the current it can sustain, and the component thickness (actually the N-epitaxial layer thickness) is proportional to the breakdown voltage.
It is worth noting that power MOSFETs with lateral structure are mainly used in high-end audio amplifiers. Their advantage is a better behaviour in the saturated region (corresponding to the linear region of a bipolar transistor) than the vertical MOSFETs. Vertical MOSFETs are designed for switching applications.

DMOS

DMOS stands for double-Diffused Metal Oxide Semiconductor. Most of the power MOSFETs are made using this technology.

MOSFET analog switch

MOSFET analog switches use the MOSFET channel as a low–on-resistance switch to pass analog signals when on, and as a high impedance when off. Signals flow in both directions across a MOSFET switch. In this application the drain and source of a MOSFET exchange places depending on the voltages of each electrode compared to that of the gate. For a simple MOSFET without an integrated diode, the source is the more negative side for an N-MOS or the more positive side for a P-MOS. All of these switches are limited on what signals they can pass or stop by their gate-source, gate-drain and source-drain voltages, and source-to-drain currents; exceeding the voltage limits will potentially damage the switch.

Single-type MOSFET switch

This analog switch uses a four-terminal simple MOSFET of either P or N type. In the case of an N-type switch, the body is connected to the most negative supply (usually GND) and the gate is used as the switch control. Whenever the gate voltage exceeds the source voltage by at least a threshold voltage, the MOSFET conducts. The higher the voltage, the more the MOSFET can conduct. An N-MOS switch passes all voltages less than (V_gate–V_tn). When the switch is conducting, it typically operates in the linear (or Ohmic) mode of operation, since the source and drain voltages will typically be nearly equal.
In the case of a P-MOS, the body is connected to the most positive voltage, and the gate is brought to a lower potential to turn the switch on. The P-MOS switch passes all voltages higher than (V_gate+V_tp). Threshold voltage (V_tp) is typically negative in the case of P-MOS.
A P-MOS switch will have about three times the resistance of an N-MOS device of equal dimensions because electrons have about three times the mobility of holes in silicon.

Dual-type (CMOS) MOSFET switch

This "complementary" or CMOS type of switch uses one P-MOS and one N-MOS FET to counteract the limitations of the single-type switch. The FETs have their drains and sources connected in parallel, the body of the P-MOS is connected to the high potential (V_DD) and the body of the N-MOS is connected to the low potential (Gnd). To turn the switch on the gate of the P-MOS is driven to the low potential and the gate of the N-MOS is driven to the high potential. For voltages between (V_DD–Vtn) and (Gnd+Vtp) both FETs conduct the signal, for voltages less than (Gnd+Vtp) the N-MOS conducts alone and for voltages greater than (V_DD–Vtn) the P-MOS conducts alone.
The only limits for this switch are the gate-source, gate-drain and source-drain voltage limits for both FETs. Also, the P-MOS is typically three times the width of the N-MOS so the switch will be balanced. Tri-state circuitry sometimes incorporates a CMOS MOSFET switch on its output to provide for a low ohmic, full range output when on and a high ohmic, mid level signal when off.

References and notes

Further Information

Get more info on 'Metal Oxide Semiconductor Field-effect Transistor'.

External Link Exchanges

Do you know how hard it is to get a link from a large encyclopaedia? Well we're different and will prove it. To get a link from us just add the following HTML to your site on a relevant page:

<a href="http://mosfet.totallyexplained.com">MOSFET Totally Explained</a>

Then simply click through this link from your web page. Our crawlers will verify your link, extract the title of your web page and instantly add a link back to it. If you like you can remove the words Totally Explained and embed the link in article text.
As long as your link remains in place, we'll keep our link to you right here. Please play fair - our crawlers are watching. Your site must be closely related to this one's topic. Any kind of spamming, dubious practises or removing the link will result in your link from us being dropped and, potentially, your whole site being banned.